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NXP Semiconductors
PCA9635
16-bit Fm+ I 2 C-bus LED driver
Table 6. MODE2 - Mode register 2 (address 01h) bit description …continued
Legend: * default value.
Bit
1 to 0
Symbol
OUTNE[1:0] [3]
Access
R/W
Value
00
Description
When OE = 1 (output drivers not enabled), LEDn = 0.
01*
10
11
When OE = 1 (output drivers not enabled):
LEDn = 1 when OUTDRV = 1
LEDn = high-impedance when OUTDRV = 0 (same as OUTNE[1:0] = 10)
When OE = 1 (output drivers not enabled), LEDn = high-impedance.
reserved
[1]
[2]
[3]
See Section 7.7 “Using the PCA9635 with and without external drivers” for more details. Normal LEDs can be driven directly in either
mode. Some newer LEDs include integrated Zener diodes to limit voltage transients, reduce EMI and protect the LEDs, and these must
be driven only in the open-drain mode to prevent overheating the IC.
Change of the outputs at the STOP command allows synchronizing outputs of more than one PCA9635. Applicable to registers from
02h (PWM0) to 17h (LEDOUT) only.
See Section 7.4 “Activ e LOW output enable input” for more details.
7.3.3 PWM0 to PWM15, individual brightness control
Table 7. PWM0 to PWM15 - PWM registers 0 to 15 (address 02h to 11h) bit description
Legend: * default value.
Address
Register
Bit
Symbol
Access Value
Description
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
0Ch
0Dh
0Eh
0Fh
10h
11h
PWM0
PWM1
PWM2
PWM3
PWM4
PWM5
PWM6
PWM7
PWM8
PWM9
PWM10
PWM11
PWM12
PWM13
PWM14
PWM15
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
IDC0[7:0]
IDC1[7:0]
IDC2[7:0]
IDC3[7:0]
IDC4[7:0]
IDC5[7:0]
IDC6[7:0]
IDC7[7:0]
IDC8[7:0]
IDC9[7:0]
IDC10[7:0]
IDC11[7:0]
IDC12[7:0]
IDC13[7:0]
IDC14[7:0]
IDC15[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0000 0000* PWM0 Individual Duty Cycle
0000 0000* PWM1 Individual Duty Cycle
0000 0000* PWM2 Individual Duty Cycle
0000 0000* PWM3 Individual Duty Cycle
0000 0000* PWM4 Individual Duty Cycle
0000 0000* PWM5 Individual Duty Cycle
0000 0000* PWM6 Individual Duty Cycle
0000 0000* PWM7 Individual Duty Cycle
0000 0000* PWM8 Individual Duty Cycle
0000 0000* PWM9 Individual Duty Cycle
0000 0000* PWM10 Individual Duty Cycle
0000 0000* PWM11 Individual Duty Cycle
0000 0000* PWM12 Individual Duty Cycle
0000 0000* PWM13 Individual Duty Cycle
0000 0000* PWM14 Individual Duty Cycle
0000 0000* PWM15 Individual Duty Cycle
A 97 kHz ?xed frequency signal is used for each output. Duty cycle is controlled through
256 linear steps from 00h (0 % duty cycle = LED output off) to FFh
(99.6 % duty cycle = LED output at maximum brightness). Applicable to LED outputs
programmed with LDRx = 10 or 11 (LEDOUT0 to LEDOUT3 registers).
IDCx [ 7 : 0 ]
PCA9635_7
duty cycle = ---------------------------
256
(1)
? NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 16 July 2009
11 of 35
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